Optimized Implementation of SM4 on AVR Microcontrollers, RISC-V Processors, and ARM Processors

Optimized Karatsuba squaring on 8-bit AVR processors

Abstract. Multi-precision squaring is a crucial operation for implementation of Elliptic Curve Cryptography. Particularly, when it comes to embedded processors, the operation should be designed carefully to execute expensive ECC operation on resource constrained devices. In order to bridge the gap between high overheads and limited computation capabilities, we present optimized Karatsuba squari...

Parallel Implementation of Neural Associative Memories on Risc Processors

Efficient Implementation of Bilinear Pairings on ARM Processors

As hardware capabilities increase, low-power devices such as smartphones represent a natural environment for the efficient implementation of cryptographic pairings. Few works in the literature have considered such platforms despite their growing importance in a postPC world. In this paper, we investigate the efficient computation of the Optimal-Ate pairing over Barreto-Naehrig curves in softwar...

Microprocessors, Digital Signal Processors and Microcontrollers

1. Microprocessors 1.1. Basic Definitions of Microprocessors 1.2. The Early Days of Microprocessors 1.3. The Era of RISC Microprocessors 1.4. Superscalar Microprocessors 1.5. VLIW Microprocessors 1.6. CISC, RISC, and VLIW Architectures Comparison 1.7. Multi-threaded and Multi-core Microprocessors 1.8. Future Directions for Multi-core Microprocessors 2. Digital Signal Processors 2.1. A Bird’s Ey...

Optimized Galois-Counter-Mode Implementation on Intel® Architecture Processors

Executive Summary Galois-Counter-Mode (GCM) is a block cipher mode of operation that uses universal hashing over a binary Galois field to provide authenticated encryption. Galois Hash is used for authentication, and the Advanced Encryption Standard (AES) block cipher is used for encryption in counter mode of operation. This paper describes an optimized implementation of GCM benefiting from the ...